The basic integrated circuit output buffer includes an input for receiving data signals of high and low potential, and an output for delivering data signals propagated through the output buffer. A relatively large current carrying capacity primary pulldown transistor element is coupled at the output for sinking a relatively large discharge current from the output to ground. A relatively large current carrying capacity primary pullup transistor element is coupled at the output for sourcing a relatively large charging current to the output from a power supply. Each transistor element is characterized by a sourcing or sinking primary current path between first and second terminal leads, and a third control terminal lead for controlling the conducting state of the primary current path.
Both MOS and bipolar integrated circuit output buffers and devices turn on the pulldown transistor element for discharging the output load capacitance and for sinking current from the output to external ground during transition from high to low potential at the output. The surge or acceleration of charge develops a voltage across the output ground lead inductance proportional to L di/dt resulting in a positive ground rise in potential or ground bounce in what should be a statically low output. This output ground bounce may typically be in the order of 0.5 to 2.5 volts above the external ground 0 volts for circuits with a power source V.sub.cc operating at 5 volts. Deceleration of the initial surge of sinking current charge through the pulldown transistor element develops another voltage across the output ground lead inductance causing a negative ground voltage undershoot of potential in the output lead of opposite polarity from the ground bounce. The absolute value of the output undershoot negative spike may be greater than the positive ground bounce spike.
Similarly both MOS and bipolar output circuits turn on the pullup transistor element for charging the output load capacitance and for sourcing current from a power supply to the output during transition from low to high potential at the output. The initial surge or acceleration of sourcing current charge develops a voltage across the output power supply lead inductance proportional to L di/dt resulting in a negative drop in the output supply voltage at the static high output lead. This drop in the output power supply voltage is referred to as supply voltage droop or V.sub.cc droop. Power supply voltage droop may be as great as for example 0.5 to 2.5 volts below the external supply voltage in circuits with a V.sub.cc power supply of 5 volts. Deceleration of the surge of sourcing current charge through the pullup transistor element develops another voltage across the output supply lead inductance causing a positive output supply voltage overshoot of potential in the output lead of opposite polarity from the V.sub.cc droop. The positive spike of the V.sub.cc overshoot above the external supply voltage may be as great as the absolute value of the negative spike of V.sub.cc droop in the output lead.
The disruptive effects of this noise on the output ground and supply leads include pulsing of noise on input and internal circuit ground and power supply lines; radio frequency radiation interference (RFI) and electromagnetic induction interference (EMI) noise which may interfere with a host system; local threshold shifts in the reference voltages for high and low potential data signals causing false data signals; and interference with other low or quiet outputs on a common bus. For example, a low output on an octal buffer line driver common bus may experience a rise with ground bounce causing a false high signal. These problems associated with output ground and supply noise are of increased concern in recent integrated circuits switch higher currents at higher speeds.
The phrase "transistor element" is used herein to refer to integrated circuit transistors from different IC technologies including MOS transistors such as NMOS, PMOS and CMOS transistor elements, and bipolar transistors including, for example, NPN and PNP transistor elements in TTL and ECL circuits. The transistor elements are generically characterized as having a primary current path with primary current path first and second terminal leads or electrodes, and a third control terminal lead or electrode for controlling the conducting state of the primary current path. In the case of an NMOS transistor element, for example, the primary current path first terminal lead is the drain lead, the second terminal lead is the source lead, and the third control terminal lead is the gate lead, etc. In the case of a bipolar NPN transistor element, the primary current path first terminal lead is the collector lead, the second terminal lead is the emitter lead, and the control terminal lead is the base lead, etc. In the case of PMOS and PNP transistor elements, the role of the first and second terminal leads are the inverse from that of the NMOS and NPN transistor elements respectively.